Monday, August 29, 2016

How much will it cost? - Don't know yet.

But, I have decided to keep track. At least as of now. I made a spreadsheet. I put into it ALL of the things I have purchased for this project so far.

A number of those things are test equipment and laboratory supplies, which won't actually be "IN" the project, but it seems reasonable to me to track ALL of the expenses and maybe exclude some things later.

Anyway, there will be significantly more to come, but I have purchased enough (it has not all yet crossed over from China) so that I can start testing timing and logic levels to make sure the parts are compatible. Some parts of the design can proceed without this info, but some depend on how the parts interact.

Ok, ok, ok, you are reading this post because you want to know where my insanity has taken me. ie, how much have I spent so far? Well I'll go one better. I am putting the $$ Purchase Log on-line and you can check here to see where I am at any point.

Also, of historical note, you'll get an idea of what it took in parts to build a mainframe computer around 1980.

So far, my wife has not subscribed to the blog. You may here some noise when that happens.

Saturday, August 27, 2016

How am I wrong #1.6

In the maintenance manual on page 7-13 in the Shift count subroutine section we find this: "right shifting, which is used in all multiplication and division, is done two places at at time.

So, I don't know why, but I do have a confirmation that I must learn how to multiple (and divide) in binary in a processor, before getting too far in the design of the arithmetic unit.  Chapter 8 of the manual does some explanation on doing math. Soon...

Also in the manual is a lot of text description of the special purpose gating, by which I mean that there are many "exceptions" to the rule to handle all kinds of partial use of the registers. In many cases a partial result will be loaded into part of a register while the rest of the register reloads from the data it is currently holding.

i.e. bits 18-35 of the AR reload (recirculate) themselves while bits 12-17 load from one source and bits 0-11 load from another. (this is not an actual example, just a representative for instance).


How am I wrong #1.5 RTFM?

Maybe I should just say #2, but this does relate to the last post. I have been reading the manual. Yeah, I know! RTFM? It's the last resort. Usually an admission of defeat. Well, I can't speak to AK (he died in 2006), so I need something to help me with the why's. Why did they do it that way?

I have some answers and there are more to come. When you read a manual, you can only digest so much at a time. Your mind is only ready for one piece of information, not the many that are available, So, you get a fact and internalize it, then you can go back, read it again, and now see the next fact. It was always there, but you couldn't see it the 1st time. You had to 'get' item one, before item 2 could be understood.

OK, another diversion, but necessary. Let's talk about multiplication. Really amazing how long it's been since I tried to multiply 2 numbers by myself. I wanted to  do that because I wanted to discuss multiply with you. I "knew" that multiplying 2 numbers was a process of adding and shifting. "Every" computer guy knows that. Well, old school guys do anyway. So I wanted to think about how WE multiply so I could discuss (briefly) the KI-10's process. (It's possible that a much longer discussion will come later)


So, as we see in the example above, we start by multiplying the 2 against the 756. We see that it is a process where the 2 is multiplied against each more significant digit, adding the carry over from the previous place when needed.
And then we multiply the "3" against the 756, (with the same digit by digit process) but it is SHIFTED over by one digit, one "10's" place.

Well, I didn't mean to write a math text, but we are this far in, so the full digit shift and add is:


The point is to remind you (you did know this once) that a multiply is a process that involves shifting the digits as we go through each step. And FINALLY I get to this point. I don't know how a KI processor multiplies. Well I kinda do, but not completely. I never had to know. I was a maintenance engineer.

When you do a multiply, there is a register that holds the results. (Let's call it the AR or Arithmetic Register, because that what it actually is called) Anyway, the AR holds the starting number, and then the process ADD and SHIFTS that number as required by the "2nd" number. So, the truth is I don't really have to fully understand the "multiply". The multiply is a series of "ADDS" and "SHIFTS".

When something in the KI processor BREAKS (which is all a maintenance engineer cares about), it  will be either the "ADD" or "SHIFT". So in fact, I only had to fix a broken ADD or SHIFT. If I got that correct, the "MULTIPLY" would take care of itself.

So, now, I am in a different place. I am designing a processor. At some point I will actually have to know how the MULTIPLY works. Well, that is not today, but, to get back to the original point, I need to know WHY they wired it the way they did.

Well, at this moment I still don't know WHY there is a 2 place shift right but only a one place shift left., BUT I have seen it discussed in the manual,so I have hope that the answer lies ahead.

What I have found is that there is a reason for wiring in the shifts INSTEAD of using a shift register. Because the output of the ADD can be (because it is wired) placed back into the adjacent bit (left or right), the add and shift can be done in ONE clock tick.

So, all those input mixers, with all that extra chip space, and all that extra wiring means a MULTIPLY is TWICE AS FAST. Shit. I don't want my updated unit to be slower! So, while I haven't come to any final design decisions, I do need to keep in mind that THEY did and ADD and SHIT in one clock tick, not two.

Maybe by the next post I'll know why they have a "2 bit" shift to the right.


Thursday, August 25, 2016

How am I wrong #1

There are probably going to be many of these. As I pour more over how it was done, I will find many things I forgot over the years....

I can't completely get rid of all the mixer chips, Well we'll see. Besides just connecting the registers, the mixers were used to connect different bit output positions to input positions. So, for example adder output bits 4,5,6,7 all get wired to AR input bit 5. They use this to do shifting of bits left or right. I may be able to limit this by using a SHIFT register directly. If I can find an appropriate one.

What I don't know now. Why the 2 bit shift to only the right? What was it's purpose?

While I'm here. the KI did NOT have the standard 74XX TTL adder chip. Perhaps it didn't appear until too late in the design cycle? I would have guessed incorrectly that I'd find 7483 chips in the adders, but no. The Dec "Magenta" M142 module used an adder put together by Dec using less sophisticated IC's.

We find yet another proprietary Dec chip in here. The DEC1074H which is a WIDE and or invert chip. Probably the 'merchants' didn't have call for a chip this wide (4 ands into the or), but Dec felt it needed enough of them to have someone build them. These are used in a few different FlipChips in the KI.

So I now know of at least 3 proprietary Dec chips that were used. Holy cow! And one of them was in the KA10!

How did the KI-10 do paging? (A long post - with history and motivations

Sent: Tuesday, August 23, 2016 5:49 PM
This back dated post gets me to current 

OK I am a little bit ahead of myself, but if I’d ever stayed on track in life I’d be a different guy. For example, I should be working RIGHT NOW and not writing this note. The goal is to do this project in retirement, but here I am spending time on it, which probably delays my retirement. (That’s how I roll)

So, I have been researching parts for my “KI clone” When I was at Fermi I learned a lot about ”bipolar” TTL logic and the KI was mostly made out of that stuff, so it was pretty easy to get into it when I went to KI school in Marlboro.

This project rattling around in my head is to build one similar, but a bit more advanced and smaller (because who needs that big a box in their living room). Why? Because I want to say I engineered a computer. It was not so different for Alan Kotok. (No, not comparing myself ). The point being, there was a KA-10, so when he designed the KI-10, it was kind of just an upgrade.

While doing this, I have come to some realization that it is almost 40 years later, and I feel a bit like I’ve been in a coma for a while.
What I know for sure is that a number of my life decisions were fear based. Path’s I didn’t take because they seemed ‘hard’ or might require work I was unwilling to do at the time. So, I didn’t go to Engineering school, I went to Tech school. I had good success at Dec, but I didn’t study for the next level of support at Dec because that seemed like too much work at the time. So I went to work setting up pioneering PC networks because I could bring mainframe expertise to that world.

I ended up having my successes and finding things to study and excel at, but felt that I had avoided certain paths.   Here we are, 40 years later. I have made a living solving technical problems for people for all of that time. I am getting ready to retire. It’s time to design a computer, like maybe I wanted to do so long ago, and never got to.

The industry has passed me by. This machine was obsolete 25 years ago.  There are others whom I have read about, who have already done what I am working on. Foonley designed the “Ten on a Desk” and sold some many years back. Another company Systems Concepts made even more advanced ones.  That’s not the point. The point is showing that I could. Maybe it counts less. There is less cost to failing now, life will go on. But, I’d like to say I did it.

So my plan is to re-engineer this thing. It will have the KI-instruction set (maybe with KL additions) and have somewhat of a similar data flow, but virtually none of the original components will be used. It will be mostly SSI integrated circuits, but several years newer than the original bipolar chips that were used in the KI. Where convenient, I will use some LSI memory to reduce chip count in that area. I also plan on micro coding the processor. Hopefully this will reduce some of the instruction decode logic, and it will allow me to fix some errors that I make.

The original 74xx series is what is mostly in the KI.
A word here about these IC’s. Integrated circuits. DEC (Digital Equipment Corp.) did not ( in the early days) make their own electronic parts. They purchased commercially available parts from what is known as ‘the merchant vendors’. These are the semiconductor houses which turned into the IC makers, which sold standardized parts to anyone building electronics. These were the Fairchild's, Motorola’s , Signetics' and Texas Instrument crowd, later joined by Intel and Advanced Micro Devices.
The point being that DEC didn’t make IC’s they bought easily available standard stuff. (cheaper)

A few years later the industry came up with 74LSxx. This was “low-power Schottky”. Faster, with about the same power consumption.
Then they came up with CMos, which was much lower power consumption, but slower.
Finally there were 74HCTxx chips. “High speed” CMos (low power) TTL compatible, so you could mix it in with other TTL chips.
So the machine will be mostly 74HCTxx chips and require far less power than the original.
And let me add that while one company may have done the R&D on a design, they usually gave or licensed it to the others, because companies wanted to know there was more than one supplier for every part.

About reducing chip count. Well before that lets discuss Dec modules. The modules were originally like the chips which followed them. The point being that you got a unit that did some small function, and then wired a bunch of them together. The modules in the KI were small, so you needed a lot of them to get higher functionality. So, there was a significant amount of space wasted, as compared to putting more chips on a larger board. This is in fact exactly what Dec did with all of its later machines. It increased the size of the boards by 10 times or more, to reduce wasted space, reduce board count and get to smaller systems.

Seems like I was gonna talk about chip count. There are several factors that will dramatically reduce chip count.
The KI was built with fairly early TTL chips, so for example the registers are mostly made out of 7474 chips. This venerable chip is 2 flip-flop’s. That is, it is “2 bits’ of whatever register we are taking about. So in a KI (36 bit word), you need 18 of these for EACH register. AR reg, BR reg,, PC reg, ARx reg, and so on.

I will be using mostly 74HCT574 chips. These are 8 bit chips. So the chip count for each KI register will go down from 18 / register to 5 / register.
Also, these chips have “tri-state” output. This means you can turn on only the output of the register you want to affect the next step. This allows the elimination of most of the “input mixer” chips. Voila!

One final tangent. Following this discreet logic came FPGA’s. These ‘Field Programmable Gate Arrays’ got more logic on a chip, so density went up and could lead to smaller designs. And then of course, we get to LSI. There is no reason why the whole PDP-10 could not be on a chip, and I believe one or 2 companies already did that. So again, I’m not creating a state of the art computer. It will, however, allow me to do all of the design work necessary for that process, and I believe it will be affordable for me to produce, which would not be the case were I to actually have someone fabricate a chip for me.

About the AC’s (or sometimes referred to as fast memory). The KI used the available at the time 7489 chip. It is a 16 word by 4 bit memory chip. So 36 of these chips were necessary to make 4 sets of 16 (36 bit) accumulators. Turns out they never made a bigger bipolar memory chip. (I think too much power, heat, etc) So, I have found some really high speed CMos static ram which could be used I haven’t decide which for sure yet, but it will probably be a 2k by 8 bit chip. So my chip count goes from 36 down to 5. Yes, you read that correctly. I need 64 words and will have 2048 words, so virtually the whole chip will be wasted. But it will take less real estate!

I am doing something similar with memory, having found a good 512k x 8 bit static CMos chip, I should be able to get a full 4M word PDP10 memory on a single board.

There are significant engineering and timing tests that will need to be done along the way, but I am making headway in defining the technology I will be using. I have actually started purchasing sample quantities of the chips, and they should start coming in soon. A lot of this is coming from somewhere in China, because somehow there are still stocks of some of this old stuff there. I have purchased some stuff on Alibaba. (Maybe if I did not get scammed [ more later] )

==============================================
Oh yeah, I started this with a question about KI-10 paging. The reason for that is that there are basically 2 things which  have been difficult (or impossible) to find regarding this KI-clone.

One is a Quicklatch connector. This (as you may recall) was the connector for the cables to the memory bus AND the I/O bus. I have not yet found one. IT was a fairly large clunky connector. Was not Mil-spec. Clearly hasn’t been used by anyone in years. So, how my processor would connect to any “KI peripherals” remains to be seen. It isn’t clear that I have to connect it to “real” peripherals. I could do emulation on various levels to replace them, but that is a decision for far down the line. Maybe I’ll come across an old MA10 memory  somewhere and get the connectors.

The second item which is unavailable has to do with the paging system. If you remember your KI-10 class, it had “associative memory” or sometimes called content addressable memory. This is memory you can load with a data word and then “read” the memory to see if that data word exists. Significant time was spent explaining this. The point was you could load a page address in there when that page was available in memory. So this memory  would tell you if a page did NOT exist meaning you had to drag it in from the disk. (paging)

Dec was pretty proud of this technology. Associative memory. Turns out, maybe they were the only ones. They had a special chip custom made for them! The DEC2104 chip. I believe it was made for them by Intel. There were 3 DEC2014’s on a DEC M260 “magenta” flipchip board. There were 8 Dec M260’s in the KI for a total of 24 DEC2104 associative memory chips.

These, in combination with the (8) M250 scratch pad modules, made up the bulk of the paging system. The M250 is somewhat noteworthy in that it ALSO had a custom chip. The DEC9035. This was an oddly designed 16 x 4 bit memory chip. This is noteworthy as it appears in the KA10 as the fast memory! Yes the KA10 had these TTL IC’s! Anyway, these are replaceable by some other memory chip.

The DEC2104 however is pretty lonely. So far in my research, none of the "Merchant suppliers" came up with any similar CAM in that technology, so DEC was apparently somewhat isolated in how they were managing paging. I could make an equivalence using some random logic, but that seems like it would take my chip count in the wrong direction(more). I have found one chip that was made (later) by Advanced Micro Devices for a while. The AM99C10. It was meant to manage (I think) Ethernet address’s and bridges. I think I can get some from China. I need to see if I can make it do the job.

Starting to get equipment

Sent: Tuesday, August 9, 2016 5:50 PM

So, patience never being my strong suit, and because really, I should be working, I have done more work on my ‘retirement project’ with no actual retirement in sight.

So I decided to buy some chips from China, because I couldn’t find them here. I can get most 74XX series stuff, but one part was proving difficult.
A 74LS182. It is the fast look ahead carry generator which helps speed up an ADD in the adder chip (74LS181) I am planning for the heart of my arithmetic unit. I think most of the rest of my machine will be 74HCTxx chips for lower power drain, but it didn’t seem like they ever made these adders in that lower power technology.

Anyway I signed up on Alibaba (the Chinese Amazon) and bought these things in Shenzhen, China. So then I said, shit I better get some test equipment so I can find out if they are selling me rocks or actual working chips.

Completely amazing how cheap this stuff is, now that it’s prehistoric. I used to have about $50k worth of test equipment on my bench at Fermi Lab. I think I can get just about everything for about $500. I saw on eBay an HP freq. counter that I had to write a ‘sole source justification’ for. It was $5k when I bought it back then. I saw one on eBay for $150.00. And newer better ones for less than that.

PS
There is more to a KI than one might have remembered.

 PPS
I have this nice JPEG of the front panel which nicely fits on my touchscreen monitor. This may turn into a touch screen version of the front panel, instead of building one.


Just one of many that were more advanced

 Sent: Monday, July 11, 2016 10:03 PM

Not claiming anything new
This image is a TOAD-2 sitting on a cart.
It is a 1 rack unit (1.75 inch high)  single chip implementation of a pdp10 which can run tops20
(This one is at the LCM in Seattle).


I’m just thinking about doing it to see if I can…

  Gary

From: Al
Sent: Monday, July 11, 2016 9:43 PM 

SRI (Stanford Research Institute) built a KL desktop a decade ago or so.
  

My Dec-10 delusions

Sent: Thursday, July 7, 2016 4:43 PM

So, still thinking about some kind of building a slightly updated KI-10 (in kind of a large desktop box. As a project when I retire.

Hard to believe I threw out all that documentation. I had a couple of manuals, but I have recently started buying a few manuals on eBay. Starting to get expensive….

A fraction of what I used to have… And how ‘bout that fiche set I tossed.


The customer print-set for the KI-10 is available online as a PDF. It costs $4.00 a page to print it on D size paper.

One is an urge to again work on a KI-10

I am back-filling here from emails, to get current.

Sent: Monday, March 9, 2015 7:58 PM
Subject:   One is an urge to again work on a KI-10

OK, My obsession is changing.
I now am thinking about building one. Not a copy, but a functional equivalent. Since I am not Paul Allen, I don’t think I could buy one.
Even at the time, I knew working on it that it was bigger than it needed to be. The design process took time(years) , and Dec was always conservative in using new technology, so they did not use the most complex TTL chips.

I think I could do a ‘desk sized’ unit for a few (ok a high few)  thousand dollars.

I am in vacation in Mexico right now, but it’s raining and there is nothing else to do in my casita…
Could take me a couple of years. Maybe more if the brain deteriorates…

Gary


Sent: Thursday, January 22, 2015 11:09 AM
Subject: There are several things that keep coming back to me. 
One is an urge to again work on a KI-10

I’ve said before and I’ll say again. I think the KI was the coolest ever.
It looked cool. You could clock tick by clock tick run stuff through registers, etc.

So there is a place that has purchased and rebuilt one. (OK I dream of that…)

In their words:

OPEN TO VIEW
Visitors are encouraged to come see and experience this 35-year-old machine that has been restored back to its original glory. The KI is a fantastic piece of engineering that was never replicated. It was a joy to use with its advanced virtual memory operating system, and for those who maintained them, they were a sight to behold with perhaps the most amazing control panel ever built for a computer system.
If you follow the article, you will be amused by the picture of the gentlemen working on the system.
Bummer is, it’s in Seattle, which I have never had a desire to visit.


Living Computer Museum
2245 First Avenue South
Seattle, WA 98134

A word of warning. Some (much) of this is going to be technical to some degree. And, I am speaking of 'old' tech. My previous emails have been to a group of former co-workers who also worked on Dec-10's. While history, and the trials of making this happen will be here, it will be aimed at people who knew Dec-10's or were involved in computing back when a mainframe was made of thousands of small scale Integrated Ciruits(IC's) and filled big rooms. Today the processor inside my phone is 200 times faster, 500 times smaller and 1000 times cheaper.

Wednesday, August 24, 2016

My PDP10? It sounds presumptuous, even to me.

My PDP10? It sounds presumptuous, even to my ears. I stand on the shoulders of giants. I will probably include a good bit of history here as I know it. Not because I am an historian, or even have done more work than internet searches, but because I an aware of those who came before, am grateful, and wish to express it.

This blog will be about my attempt to build a PDP10 compatible processor and perhaps some peripherals so it can run the native proprietary operating system TOPS-10.

This is the "KI-10" "DecSystem-10" "PDP-10" system at the Living Computer Museum in Seattle. This museum is a Paul Allen project and I believe he and Bill Gates programmed on Dec-10's back in the day. I was a Dec-10 maintenance engineer at that time.

Retirement is nearing. From time to time I have thought of finding and restoring one of these old machines, just to see if I could. Starting to see this one is running at the LCM has fueled this desire. I haven't been out there yet, but look forward to at least a visit. I'd love to ask if they need any help with any part of the project. Maybe I'll find the time and voice for that....

But, as mentioned above, my current main thought is that I probably don't have the resources to find and restore one of these systems, but maybe I could engineer a work-alike.

I have been thinking about this for most of a year, I have blue skied, done internet research, and even proceeded with some purchases. I have emailed some friends on this and will use some of those emails to get this party started.

Hopefully MUCH more to follow, although progress will be very sporadic. I am not sure how many people were in the Dec LCG engineeering group and working on the mainframes, but I am pretty sure it was more than one old guy sitting in a hallway upstairs in his house. I do have some advantages. It's many years later. Better schematic drawing tools exist. Laboratory test gear to do the job can be purchased on eBay (and some new) for 10% of their former cost. The cost of semi-comparable logic IC's is also fractions of what it once was.

I'd be kidding myself if I didn't think this will take a fair bit of time. Stay tuned to see if I retain the ability to reason long enough to finish....